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baseline","url":"https://ptob.dev/research/#w12-utc-basis"},{"text":"Original PDF","url":"https://ptob.dev/papers/preview/?file=%2Fpapers%2Fptob-esp32s3-timing-preprint.pdf"},{"text":"https://ptob.dev/research/esp32-s3-causal-clock-discipline/","url":"https://ptob.dev/research/esp32-s3-causal-clock-discipline/"},{"text":"Read PDF","url":"https://ptob.dev/papers/preview/?file=%2Fpapers%2Fptob-esp32s3-timing-preprint.pdf"},{"text":"Cite this edition","url":"https://ptob.dev/research/esp32-s3-causal-clock-discipline/#citation"},{"text":"Paper sources on GitHub","url":"https://github.com/yantisj2/PToB/blob/main/papers/README.md"},{"text":"Affordable timing from Starlink over WiFi","url":"https://ptob.dev/research/starlink-wifi-timing/"},{"text":"Trustworthy timing in Zephyr","url":"https://ptob.dev/research/zephyr-hardware-timestamps/"},{"text":"Low-level timing on ESP32-S3","url":"https://ptob.dev/research/esp32-s3-event-capture/"},{"text":"BLE timing tails and multipath","url":"https://ptob.dev/research/ble-timing-tails-multipath/"},{"text":"From BLE to a Pi NTP/PTP gateway","url":"https://ptob.dev/research/pi5-mhat-time-gateway/"},{"text":"From USB frames to a macOS clock","url":"https://ptob.dev/research/usb-macos-time-transfer/"},{"text":"Empirical BLE-trained holdover","url":"https://ptob.dev/research/empirical-ble-holdover/"},{"text":"Timing information and power scheduling","url":"https://ptob.dev/research/awake-timing-power-scheduling/"},{"text":"All research & evidence","url":"https://ptob.dev/research/"}],"text":"# Precision Bluetooth Timing on ESP32-S3: Causal Clock Discipline and Hardware Event Capture\n\nResearch draft  22 October 2026  8 pages · PDF\n\nHow does internal causal clock quality compare with an independently observed relative PPS result?\n\n[Read PDF](https://ptob.dev/papers/preview/?file=%2Fpapers%2Fptob-esp32s3-timing-preprint.pdf)[Cite this edition](https://ptob.dev/research/esp32-s3-causal-clock-discipline/#citation)\n\n## Overview\n\nThe completed 660-second ESP32-S3 experiment measured 166.590 ns relative-PPS RMS across 657 eligible records, with three invalid and zero nominal missing. A fresh N30 second-board transfer measured 150.954 ns RMS across 48 eligible of 64 records.\n\n## What this paper covers\n\n- Separate internal prediction RMS from delivered relative-PPS error.\n- Keep calibration-selected data distinct from fresh transfer validation.\n- Retain output tails and every unavailable record when assessing a timing target.\n\n## Research scope\n\nThe first window retains a 1,591 ns maximum. The later transfer retains 16 invalid records and a 362 ns maximum. An observed 49 ns internal display RMS is a different metric. The sub-100 ns downstream target, RF endpoint delay, physical output and absolute UTC remain unqualified.\n\n## Read it in context\n\nThis is the dated 22 October follow-up. The 24 October W12 baseline is a separate later population with different source versions and calibration; it does not overwrite this paper’s measurements.\n\n[Selected experiment and reproduction](https://github.com/yantisj2/PToB/tree/main/evidence/s3/2026-10-22-fine)[Later W12 baseline](https://ptob.dev/research/#w12-utc-basis)\n\n## Cite this edition\n\nJonathan Yantis. Precision Bluetooth Timing on ESP32-S3: Causal Clock Discipline and Hardware Event Capture. 22 October 2026. Research draft. [Original PDF](https://ptob.dev/papers/preview/?file=%2Fpapers%2Fptob-esp32s3-timing-preprint.pdf).\n\nSummary permalink: [https://ptob.dev/research/esp32-s3-causal-clock-discipline/](https://ptob.dev/research/esp32-s3-causal-clock-discipline/)\n\nJonathan Yantis leads protocol design, hardware development and research. GPT 6.1 contributes implementation, analysis and documentation. This page summarizes the linked edition; retain its original evidence dates and measurement references.\n\n## The full paper\n\nThe original document includes the technical detail and references behind this summary.\n\n[Read PDF](https://ptob.dev/papers/preview/?file=%2Fpapers%2Fptob-esp32s3-timing-preprint.pdf)\n[Cite this edition](https://ptob.dev/research/esp32-s3-causal-clock-discipline/#citation)\n\n[Paper sources on GitHub](https://github.com/yantisj2/PToB/blob/main/papers/README.md)\n\n## Continue exploring\n\n[Affordable timing from Starlink over WiFi](https://ptob.dev/research/starlink-wifi-timing/)[Trustworthy timing in Zephyr](https://ptob.dev/research/zephyr-hardware-timestamps/)[Low-level timing on ESP32-S3](https://ptob.dev/research/esp32-s3-event-capture/)[BLE timing tails and multipath](https://ptob.dev/research/ble-timing-tails-multipath/)[From BLE to a Pi NTP/PTP gateway](https://ptob.dev/research/pi5-mhat-time-gateway/)[From USB frames to a macOS clock](https://ptob.dev/research/usb-macos-time-transfer/)[Empirical BLE-trained holdover](https://ptob.dev/research/empirical-ble-holdover/)[Timing information and power scheduling](https://ptob.dev/research/awake-timing-power-scheduling/)[All research & evidence](https://ptob.dev/research/)"}}