PToBPrecision Time
over Bluetooth

T096 timing architecture

Trace the physical captures, fine clock maps and retained UTC translation in the current GM implementation. Choose a mode, then select a block to inspect its evidence and limits.

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Alternative paths are shown together. A device uses one delivered-clock path at a time; choose a mode to trace that selection.

T096 precision timing hardware and software schematic A fixed-crystal 16 MHz counter captures GNSS PPS and BLE ADDRESS events. Separate source, follower SoftPLL and relay-clock discipline paths select one causal delivered software map. A fixed unqualified source-to-UTC offset is shared by GM precision publication, preferred JOIN and display. USB-to-Mach composition retains a closed precise-UTC gate. Control tasks govern authority and controller ownership. Independent PPS shadow observes the previously delivered map and never trains the BLE clock. T096 precision clock · timing architecture Hardware captures establish event coordinates. Fine maps and a retained, unqualified UTC offset give those coordinates their time interpretation. Capture hardwarePrecision processingApplied clockService & measurement UARTPPS edgeADDRESScaptured PPSbounded capture recordsRXparent RX pairsactual TX capture → later correctionscheduled BLE transmission · controller-ownedIndependent local PPS witness · no return path to BLE / RC disciplinereference validitysource evidencescope / admission / expiry GNSS receiverUC6580 · satellite timeUART labels + physical PPSPPS accuracy not commissionedBLE radio + controllerRADIO ADDRESS · TX / RXActual event / channel / PDUOne exclusive controller ownerShared hardware counterFixed HF crystal → TIMER316 MHz · 62.5 ns per tickPPS P1.11 → GPIOTE / PPIRadio: ADDRESS → PPI → CC1CC0 PPS · ticks + capture epochUTC / PPS evidencePPS association: UNKNOWNPPS cadence + fresh fixSource / witness evidenceGNSS source disciplinePPS interval → rate estimateOwn-PPS phase alignment / slewCausal counter → source mapsPhysical-event pairingOriginal RX + later correctionActual TX capture associationReference-edge calibrationRoot / boot / epoch / ageBLE causal servoEstimate relative phase + rateScore the prior delivered mapFit ≠ delivered clock errorSoftPLL · software clockApply numerical rate + phase slewPreserve causal handoverLock: phase / trend / dwellFixed quartz remains unchangedRC rate estimateAuthenticated parent pairsRelative local / parent rateInherited root + source ageRC clock disciplineRate-normalized local mapContinuous phase slew / fencingImmutable map generationsDelivered software clockOne active delivery pathAnchor + rate + phaseScope / freshness / expiryHeld time: bounded horizonInvalidate at scope lossTiming train publisherGM: independent source clockRC: disciplined local clockOriginal now → correction laterActual TX tick + causal mapRC keeps root provenance + ageTime queries + displayGM: precision / JOIN / displayOne retained UTC interpretationLock ≠ precision boundIndependent PPS shadowLocal PPS tick → prior map queryCausal phase / bias / RMS / tailsRetain invalid, missing, expiredNo return to BLE / RC servoControl tasks · authority and lifecycleDiscovery / authentication / source eligibility / GM election / HOT admissionRC parent and downstream admission are separate from GM membershipScope mailboxes · controller submission · profile changes fence and drain old ownersControl grants context and permission; it never manufactures physical timestamps Source → UTC translationOne integer offset per epochFine map + retained UTC offsetUnknown initial UTC biasUSB → macOS compositionCounter → source → UTCUSB counter → host MachPrecise UTC gate: CLOSEDUTCQ1 not implementedTask separation 64 MHz CPU · 15.625 ns cycle Capture callbacks latch / enqueue. Precision work owns clock history. Control passes bounded context. Timing data Control / permission Read-only witness Lines show logical flow, not latency or wire length. Fixed quartz · software phase/rate actuation · functional lock and calibrated output accuracy remain separate.
Select a block to inspect its timing checks.Fixed crystal · software phase and rate discipline

This schematic describes logical paths and ownership. Precision and control functions may share an owner in some profiles; their evidence and responsibilities remain separate. The UTC offset is stable but unqualified: initial bias and UC6580 PPS association remain unknown. The host precise-UTC gate stays closed; UTCQ1 is not implemented. Electrical output and absolute UTC require independent calibration.