CoreClock timing architecture

Trace the implemented BLE receiver from controller timestamps to delivered time. Inspect clock-domain bridges, phase and rate corrections, and independent PPS checks. GM and precision transmit modules remain unfinished.

Trace CoreClock’s BLE100 receiver, fixed civil epoch, core placement and independent PPS witness. Transmitter roles and BLE50 validation remain unfinished.

CoreClock · timing on CPU1 / UI on CPU0 · fixed civil epoch for normal GR3 · optional GPS v2.1 witness. BLE50 is staged.

Block inspection

Selected block

CoreClock civil epoch: For the selected normal GR3 PPS-relative producer, resolve the nearest whole-second civil offset from authenticated coarse time. Require the aged guard plus rounding residual to stay strictly below half a second; reject ties, conflicts and overflow.
Immutable publication: Fix that civil epoch within the authenticated scope and publish it together with the relative model as one coherent snapshot. Later fractional coarse offsets remain diagnostic and do not steer precision phase or frequency.
Scoped output correction: The reported CoreClock BLE100 test used a frozen +3,056 ns output correction after RX normalization. It applies once to published time under exact applicability checks. The 137 ns RMS, 300/300 comparison result belongs to that configuration.

Trace drift or offsets

Error steadily ramps

Raw repeated-channel RX intervals → controller/GPTimer bridge continuity → fitted rate → applied rate → remaining phase. Check oscillator temperature/load and the age of the current fit.

Stable microsecond offset

Check the actual PHY and live RX reference first. Apply RX subtraction once before fitting; inspect any scoped output-only correction separately. Preserve signed bias and reference uncertainty.

Whole-second or millisecond jump

Inspect UTC composition, authenticated source scope and actual producer contract. Check signed source UTC and civil-epoch association independently from relative timing. Fence gross map errors; never absorb them into rate or GPS training.

Good fit, poor delivered time

Compare the prior delivered prediction, completion/publication tick and applied phase slew. Centered fit scatter can hide fixed endpoint bias and accumulated phase.

Lock cycles or hold grows too far

Compare recent causal RMS/peak, phase left, rate/acceleration guards, model age and UI settling. Keep failed frozen forecasts. A lease refresh must not extend an old map’s horizon.

Packets arrive, no usable time

Trace physical record match, verified RX reference, authenticated original/correction pair, parent path and signed expiry. Callback totals and PA sync are not corrected-update coverage.

GPS packet / PPS, no valid witness

Separate checksum-valid packet activity, advancing fix/UTC, physical pulse, counter bridge and prior-map availability. Missing reference, uncertain association and evicted history remain explicit.

Logical architecture reviewed against the CoreClock receiver and its precision handoff. This is a source map for understanding and diagnosis, not live telemetry or a wiring diagram. Local timer, BLE capture and PPS capture resolutions are distinct; calibrated electrical output and absolute UTC remain separate measurements.

Implementation scope and reference sources

This view follows CoreClock’s BLE receiver, clock-domain bridge, fixed civil epoch, coherent publication and independent PPS history. Its BLE100 result and hardware configuration are documented in the CoreClock guide; BLE50 and transmitter roles remain unfinished.